การอ่านค่า RAM โดยวิเคราะห์จากตัวเลขที่อยู่บน Chip

SAMSUNG DDR SDRAM DIMM/SODIMM

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1. Memory Module(M)
2. Module Configuration
3 : 4/8 Byte DIMM
4 : 4/8 Byte SODIMM
 
3. 4. Data Bit
12 : x72 184pin 1U Register DIMM
19 : x64 192pin U-DIMM
22 : x72 224pin Register DIMM
28 : x72 208pin Register DIMM
32 : x32 160pin U-DIMM
46 : x72 294pin Register DIMM with PLL
47 : x72 294pin Register DIMM with PLL(512MB DIR2)
63 : x64 172pin U-DIMM
64 : x64 160pin U-DIMM
66 : x64 168pin U-DIMM
68 : x64 184pin U-DIMM
70 : x64 200pin U-DIMM
72 : x64 184pin Register DIMM
73 : x64 184pin Register DIMM with FET switch
74 : x72 168pin U-DIMM
78 : x64 240pin U-DIMM
81 : x72 184pin U-DIMM
83 : x72 184pin Register DIMM
85 : x72 200pin U-DIMM
88 : x72 200pin Register DIMM
89 : x64 200pin Register DIMM
91 : x72 240pin U-DIMM
93 : x72 240pin Register DIMM
5. Feature,Voltage
C : Network-DRAM,(2.5V VDD)
H : DDR SDRAM (3.3V VDD)
T : DDR-ฅฑ
L : DDR SDRAM (2.5V VDD)
 
6. 7. Depth
01 : 1M 02 : 2M
04 : 4M 08 : 8M
09 : 8M(for 128Mb/512Mb) 16 : 16M
17 : 16M(for 128Mb/512Mb) 28 : 128M
29 : 128M(for 128Mb/512Mb) 32 : 32M
33 : 32M(for 128Mb/512Mb) 56 : 256M
64 : 64M 65 : 64M(for 128Mb/512Mb)
8. # of bank in Comp.,Interface,Refresh
0 : 4bank,Mixed interface,64m/4K Refresh(15.6us)
1 : 4bank,SSTL_2,64m/4K Refresh(15.6us)
2 : 4bank,SSTL_2,64m/8K Refresh(7.8us)
3 : 8bank,SSTL_2,128m/16K Refresh(7.8us)
5 : 4bank,SSTL(1.8V,1.8V),64ms/8K(7.8us)
9. Composition Component
0 : x4
3 : x8
4 : x16
5 : x32
6 : x16+x32
7 : x4 Stack(Uniframe)
8 : x4 Stack(Flexframe)
9 : x8 Stack(Flexframe)
10. Component Generation
M : 1st Generation
A : 2nd Generation
B : 3rd Generation
C : 4th Generation
D : 5th Generation
E : 6th Generation
11. Package
G : UBGA K : TSOP2-400 for DDP
N : STSOP2 T : TSOP2-400
U : TSOP2-400F-LF  
12. PCB Revision & Type
0 : None 1 : 1st Rev.
2 : 2nd Rev. 3 : 3rd Rev.
L : Low Cost M : New PC2700
S : PCB 6 Layer  
13. " - "
14. Power
C : Normal Power, Self Ref.
L : Low Power, Self Ref.
15. 16. Speed
A0 : 10 ns @CL2 A2 : 7.5 ns @CL2
A3 : 6 ns @CL2 A4 : 5 ns @CL2
AA : 7.5 ns @CL2,TRCD2,TRP2 B0 : 7.5ns @CL2.5
B3 : 6 ns @CL2.5 B4 : 5 ns @CL2.5
C4 : 5 ns @CL3 C5 : 3.75 ns @CL3
CC : 5ns@CL3,TRCD3,TRP3 D3 : 6 ns @CL4
D4 : 5 ns @CL4 D5 : 3.75 ns @CL4
D6 : 3.0 ns @CL4 E4 : 5 ns @CL5
E5 : 3.75 ns @CL5 E6 : 3.0 ns @CL5
F6 : 3.0 ns @CL6  
17. 18. Customer (Special Handling) "Customer List Reference"

SAMSUNG SDRAM DIMM/SODIMM

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1. Memory Module(M)
2. Module Configuration
3 : 4/8 Byte DIMM(100, 168, 200, 232, 278pin)
4 : 8 Byte SODIMM(144pin)
8 : 4 Byte AIMM(132pin)
3. 4. Data bits
20 : x72/ECC PLL+Register DIMM with PPD
23 : x144/ECC PLL+Register DIMM
32 : x32 AIMM w/o SPD
45 : x144/ECC PLL+Register DIMM for 200pin(SGI)
50 : x72/ECC w/o PLL+Register DIMM with SPD for 168pin(Intel)
63 : x64 micro DIMM with SPD
64 : x64 PC100 SODIMM with SPD
65 : x64 168pin w/o SPD(Old JEDEC)
66 : x64 U-DIMM/SODIMM with SPD
74 : x72/ECC U-DIMM with SPD
75 : x72/ECC PLL+Register DIMM with SPD for 168pin(JEDEC)
77 : x72/ECC PLL+Register DIMM with SPD for 168pin(Intel)
78 : x72/ECC PLL+Register DIMM with SPD for 200pin(JEDEC)
79 : x72/ECC PLL+Register DIMM with PPD for 200pin(SGI)
81 : x72/ECC U-DIMM for 200pin(IBM)
90 : x72/ECC PLL+Register DIMM with SPD for 168pin(RCC)
5. Feature,Voltage
S : SDRAM.3.3V  
6. 7. Depth
01 : 1M 02 : 2M
04 : 4M 08 : 8M
09 : 8M(for 128Mb/512Mb) 12 : 96M
16 : 16M 17 : 16M(for 128Mb/512Mb)
28 : 128M 29 : 128M(for 128Mb/512Mb)
32 : 32M 33 : 32M(for 128Mb/512Mb)
56 : 256M 64 : 64M
65 : 64M(for 128Mb/512Mb)  
8. Refresh,# of banks,Interface
0 : 4K/64ms Ref., 2Bank, LVTTL  
1 : 2K/32ms Ref., 2Bank, LVTTL  
2 : 4K/64ms Ref., 4Bank, LVTTL  
3 : 4K/64ms Ref., 2Bank, SSTL  
5 : 8K/64ms Ref., 4Bank, LVTTL  
9. Composition Component
0 : x4
3 : x8
4 : x16
5 : x32
6 : x16+x32
7 : x4 Stack(Uniframe)
8 : x4 Stack(Flexframe)
9 : x8 Stack(Flexframe)
10. Generation
M : 1st Generation
A : 2nd Generation
B : 3rd Generation
C : 4th Generation
D : 5th Generation
E : 6th Generation
F : 7th Generation
11. Package
G : CSP(กๆUBGA, WBGA) L : LSSOP
N : STSOP2-400 K : TSOP2-400 for DDP
O : TSOP2-400-LF T : TSOP2-400
U : TSOP2-400F-LF  
12. Package
0 : None 1 : 1st Rev.
2 : 2nd Rev. 3 : 3rd Rev.
C : CPQ 200pin 133MHz F : PC66 4Layer
H : HP M : IBM
N : NOKIA P : for Apple 1.15inch U-DIMM
R : for SUN 2.5inch NGDIMM Q : COMPAQ
S : PC100 4Layer U : Intel 1U DIMM
Y : SONY L : PC66
13. " - "
14. Power
C : Normal Power, Self Ref.
L : Low Power, Self Ref.
   
15. 16. Speed(tCC : Default CL3)
10 : 10ns PC66 12 : 12ns
15 : 15ns 1H : 10ns @CL2 PC100
1L : 10ns PC100 50 : 5ns
60 : 6ns 70 : 7ns
75 : 7.5ns PC133 7A : PC133 3-3-3 + PC100 2-2-2
7B : PC133 3-2-2 + PC100 2-2-2 7C : 7.5ns PC133 2-2-2 80 : 8ns
80 : 8ns  
17. 18. Customer(Special Handling) "Customer List Reference"

samsung EDO/FastPage DIMM/SODIMM

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1. Memory Module (M)
2. DIMM Configuration
3 : DRAM DIMM 4 : DRAM 8 Byte SODIMM
3~4. Data bits
32/36 : x32/x36 bit
66 : x64 Unbuffered DIMM
44/64/72 : x144/x64/x72 bit
74 : x62 Unbuffered DIMM
5. Feature
C : F/P, 5V
E : EDO, 5V
V : F/P, 3.3V
F : EDO, 3.3V
6~7. Depth
01 : 1M
08 : 8M
02 : 2M
16 : 16M
04 : 4M
32 : 32M
8. Refresh
0 : 4K Cycle
2 : 1K Cycle
1 : 2K Cycle
8 : 8K Cycle
9. Composition Component
0 : x4
2 : x4 + x4(Quad CAS)
4 : x16
1 : x4 + x1
3 : x8
5 : x16 + x4(Quad CAS)
10. Component Revision
M : 1st Generation
B : 3rd Generation
D : 5th Generation
A : 2nd Generation
C : 4th Generation

11. Package Type
J : SOJ-400 & Gold Tab
T : TSOP2-400 & Gold Tab
G : UBGA
B : SOJ-300 & Gold Tab
F : TSOP2-300 & Gold Tab
N : STSOP2-400
12. PCB Revision
0 : None
3 : 3rd Rev.
1 : 1st Rev.
4 : 4th Rev.
2 : 2nd Rev.
R : CRAY
13. "-"
14. Power
C : Normal L : Low Power & Self Refresh
15~16. Speed
70 : 70ns
45 : 45ns
60 : 60ns
40 : 40ns

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